嵌入式处理器

Embedded Processors

MACOM公司提供业界极为广泛的交叉点开关器件组合,这些器件的通道数从2x2一直到288x288,数据传输速率范围为3.2 Gbps到12.8 Gbps甚至更高。我们的器件采用信号调理技术,支持系统设计人员选用低成本电路板和元件,同时提高设计余量。

凭借MACOM公司广泛的与协议无关的交叉点产品组合,我们可提供适用于各种应用(包括视频广播路由器和交换机、HDMI切换器和DWDM物理层路由器等)中切换高数据率信号的解决方案。

搜索历史
最近浏览的产品
  • 未找到最新产品!

条件搜索

部件号 订货 封装 Clock Frequency DDR3 + ECC 10/100/1000 Ethernet SA TA HD LC PCle Gen 2 Typical Power (W) USB 2.0 with PHY 最大数据速率(Gbps) 产品照片 电源电压 通道数量 硬件手册 嵌入CDR I/O Matrix 嵌入式SerDes Number of CPU Cores 特性 Product Brief 应用笔记 User Guides Errata User Guide Eval User Guide Eval User Guide Software Eval User Manual Software
 
APM86491 询问 19x19 WB-PBGA
800 MHz - 1 GHz
16b/32b
2 GbE: 2 RGMII
2
N/A
2x1
3.65 W @ 1 GHz
2 (USB 3.0)
Black Mamba.png
Datasheet
Single-Core Power™465 processor with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256KB L2 cache
Hardware cache coherency
DDR3 memory controller with optional ECC (72-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Two GE ports (RGMII) with Classification and TCP/IP off-load
Two PCI Express® Gen 1/2 (x1) ports
USB: One USB 3.0 Host with integrated PHY, One USB 3.0 Host/Device with integrated PHY
Two SATA 2.0 ports
Other Interfaces: NAND Flash Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
JTAG/Trace
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
APM86x90_AN_PowerGuide.pdf
APM86x91_Cascade_GSG.pdf
APM86x91_AN_LowPwrOp_2011_0030.pdf
PPC465_UM4110.pdf
PPC465_UM4110 2.pdf
APM86x91_Cascade_GSG (1).pdf
APM86x91_Cascade_UM_software.pdf
APM86x91_Cascade_UM.pdf
APM86791 询问 19x19 WB-PBGA
800 MHz - 1 GHz
16b/32b
4 GbE: 2 RGMII, 2 SGMII
1
2
2x1
3.65 W @ 1 GHz
2
Black Mamba.png
Datasheets
1
Single-Core Power™465 processor with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256 KB L2 cache
Hardware cache coherency
DDR3 memory controller with optional ECC (72-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Four GE ports (2 SGMII, 2 RGMII) with Classification and TCP/IP off-load
Two PCI Express® Gen 1/2 (x1) ports
USB: One USB 2.0 Host with integrated PHY, One USB 2.0 Host/Device with integrated PHY
One SATA 2.0 port
Other Interfaces: NAND Flash Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
Product Brief
APM86x91_Cascade_GSG.pdf
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
APM86x90_AN_PowerGuide.pdf
APM86x91_AN_LowPwrOp_2011_0030.pdf
APM86791_AN_HDVideo_2013_0001.pdf
PPC465_UM4110.pdf
PPC465_UM4110 2.pdf
APM86x91_Cascade_GSG (1).pdf
APM86x91_Cascade_UM_software.pdf
APM86x91_Cascade_UM.pdf
APM86391 询问 27x27 FC-PBGA
600 MHz - 1.0 GHz
32b
2 GbE: 2 RGMII
1
N/A
3x1
Dual Core 5 W @ 1 GHz
3
Black Mamba.png
Datasheet
Single-Core Power™465 processor with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256 KB L2 cache
Hardware cache coherency
DDR3 memory controller with optional ECC (36-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Two GE ports (RGMII) with Classification and TCP/IP off-load
PCI Express® : Three Gen 1/2 (x1) ports
USB: Two USB 2.0 Hosts with integrated PHYs, One USB 2.0 OTG with integrated PHY
One SATA 2.0 ports
Other Interfaces: NAND Flash Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
JTAG / Trace
APM86x90_AN_HWMG.pdf
APM8669x_APM86x90_APM8639x_AN_PwrMgmt_2009_0006.pdf
APM86xxx_Aspen_Serengeti2_SW_RN_v1.4_2012_0040.pdf
APM86xxx_swrn_sgeti_aspen_v1.0_2012_0040.pdf
APM86xxx_AN_Crypto_2011_0024.pdf
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
APM86x90_APM8639x_DDR_pkg_delays.pdf
APM8669x_APM86x90E_APM8639xE_UM2011.pdf
PPC465_UM4110.pdf
User Guide
Aspen_BSP_UM_2.02.03.pdf
PPC465_UM4110 2.pdf
APM86391B_V0p1.zip
APM8639x_RevA_bsdl.zip
APM86392 询问 27x27 FC-PBGA
600 MHz - 1.0 GHz
32b
2 GbE: 2 RGMII
1
N/A
3x1
Dual Core 5 W @ 1 GHz
3
Black Mamba.png
APM86392.pdf
Dual-Core Power™465 processor each with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256 KB L2 cache per processor
Hardware cache coherency
DDR3 memory controller with optional ECC (36-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Two GE ports (RGMII) with Classification and TCP/IP off-load
PCI Express® : Three Gen 1/2 (x1) ports
USB: Two USB 2.0 Hosts with integrated PHYs, One USB 2.0 OTG with integrated PHY
One SATA 2.0 ports
Other Interfaces: NAND Flash Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
JTAG / Trace
Product Brief
APM8669x_APM86x90_APM8639x_AN_PwrMgmt_2009_0006.pdf
APM86xxx_Aspen_Serengeti2_SW_RN_v1.4_2012_0040.pdf
APM86xxx_swrn_sgeti_aspen_v1.0_2012_0040.pdf
APM86x90_AN_HWMG.pdf
APM86xxx_AN_Crypto_2011_0024.pdf
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
APM86x90_APM8639x_DDR_pkg_delays.pdf
PPC465_UM4110.pdf
User Guide
Aspen_BSP_UM_2.02.03.pdf
PPC465_UM4110 2.pdf
APM86391B_V0p1.zip
APM8639x_RevA_bsdl.zip
APM86190 询问 27x27 FC-PBGA
800 MHz - 1.2 GHz
64b / 32b
2 GbE: 2 RGMII
2
N/A
2x1 & 1x4
Dual Core 7.06 W @ 1 GHz
3
Green Mamba.png
Datasheet
Single-Core Power™465 processor with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256 KB L2 cache
Hardware cache coherency
DDR3 memory controller with optional ECC (72-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Two GE ports (RGMII) with Classification and TCP/IP off-load
PCI Express® : One Gen 1/2 (x4/x1) port , Two Gen 1/2 (x1) ports
USB: Two USB 2.0 Hosts with integrated PHYs, One USB 2.0 OTG with integrated PHY
Two SATA 2.0 ports
Other Interfaces: NAND Flash Controller, LCD Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
JTAG / Trace
Product Brief
APM86xxx_Aspen_Serengeti2_SW_RN_v1.4_2012_0040.pdf
APM8669x_APM86x90_APM8639x_AN_PwrMgmt_2009_0006.pdf
APM86xxx_Aspen_Serengeti2_SW_RN_v1.4_2012_0040.pdf
APM86x90_AN_DDR3.pdf
APM86x90_AN_InterfaceGuide.pdf
APM86x90_AN_SLIMproPwrMgt.pdf
APM86x90_AN_PowerGuide.pdf
APM86xxx_AN_Crypto_2011_0024.pdf
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
APM86x90_APM8639x_DDR_pkg_delays.pdf
APM86x90_swrn_sgeti_v1.20_2011_0006.pdf
Serengeti_Software_RN_2011_0006_v1_03.pdf
Serengeti_Software_RN_2011_0006_v1_06.pdf
PPC465_UM4110.pdf
APM8669x_APM86x90E_APM8639xE_UM2011.pdf
Errata
User Guide
Aspen_BSP_UM_2.02.03.pdf
PPC465_UM4110 2.pdf
APM86x90_Serengeti_Software_RN_2011_0006_v1.12.pdf
APM86x90_Serengeti_Software_RN_2011_0006_v1.11.pdf
APM86x90_Serengeti_Software_RN_2011_0006_v1.08.pdf
APM86190_V0p1.zip
aspen_ramdisk_2.02.03.tgz.zip
aspen_ramdisk_1.03.04.tgz.zip
aspen_ramdisk_1.04.22.tgz.zip
aspen_ramdisk_1.05.04.tgz.zip
aspen_ramdisk_2.01.09.tgz.zip
APM86290 询问 27x27 FC-PBGA
800 MHz - 1.2 GHz
64b / 32b
2 GbE: 2 RGMII
2
N/A
2x1 & 1x4
Dual Core 7.06 W @ 1 GHz
3
Green Mamba.png
Datasheet
Dual-Core Power™465 processor each with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256 KB L2 cache per processor
Hardware cache coherency
DDR3 memory controller with optional ECC (72-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Two GE ports (RGMII) with Classification and TCP/IP off-load
PCI Express® : One Gen 1/2 (x4/x1) port , Two Gen 1/2 (x1) ports
USB: Two USB 2.0 Hosts with integrated PHYs, One USB 2.0 OTG with integrated PHY
Two SATA 2.0 ports
Other Interfaces: NAND Flash Controller, LCD Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
JTAG / Trace
Product Brief
APM86xxx_Aspen_Serengeti2_SW_RN_v1.4_2012_0040.pdf
APM8669x_APM86x90_APM8639x_AN_PwrMgmt_2009_0006.pdf
APM86xxx_swrn_sgeti_aspen_v1.0_2012_0040.pdf
Serengeti_Software_RN_2011_0006_v1_03.pdf
Serengeti_Software_RN_2011_0006_v1_06.pdf
APM86x90_AN_DDR3.pdf
APM86x90_AN_InterfaceGuide.pdf
APM86x90_AN_SLIMproPwrMgt.pdf
APM86xxx_AN_Crypto_2011_0024.pdf
APM86x90_AN_PowerGuide.pdf
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
APM86x90_APM8639x_DDR_pkg_delays.pdf
APM8669x_APM86x90E_APM8639xE_UM2011.pdf
APM86x90_Serengeti_Software_RN_2011_0006_v1.08.pdf
APM86x90_Serengeti_Software_RN_2011_0006_v1.11.pdf
APM86x90_Serengeti_Software_RN_2011_0006_v1.12.pdf
APM86x90_Serengeti_Software_RN_2011_0006_v1.12.pdf
Errata
Aspen_BSP_UM_2.02.03.pdf
PPC465_UM4110 2.pdf
APM86691 询问 27x27 FC-PBGA
800 MHz - 1.2 GHz
64b / 32b
4 GbE: 2 RGMII, up to 4 SGMII
2
2
2x1 & 1x4
Dual Core 7.06 W @ 1 GHz
3
Black Mamba.png
Datasheet
Single-Core Power™465 processor with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256 KB L2 cache
Hardware cache coherency
DDR3 memory controller with optional ECC (72-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Four GE ports with Classification and TCP/IP off-load, up to 2 SGMII + 2RGMII or up to 4 RGMII
PCI Express® : One Gen 1/2 (x4/x1) port , Two Gen 1/2 (x1) ports
USB: Two USB 2.0 Hosts with integrated PHYs, One USB 2.0 OTG with integrated PHY
Two SATA 2.0 ports
Other Interfaces: NAND Flash Controller, LCD Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
JTAG / Trace
Product Brief
APM8669x_APM86x90_APM8639x_AN_PwrMgmt_2009_0006.pdf
APM86xxx_Aspen_Serengeti2_SW_RN_v1.4_2012_0040.pdf
APM86xxx_swrn_sgeti_aspen_v1.0_2012_0040.pdf
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
PPC465_UM4110.pdf
APM8669x_APM86x90E_APM8639xE_UM2011.pdf
Aspen_BSP_UM_2.02.03.pdf
APM86692 询问 27x27 FC-PBGA
800 MHz - 1.2 GHz
64b / 32b
4 GbE: 2 RGMII, up to 4 SGMII
2
2
2x1 & 1x4
Dual Core 7.06 W @ 1 GHz
3
Black Mamba.png
Datasheet
Dual-Core Power™465 processor each with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256 KB L2 cache per processor
Hardware cache coherency
DDR3 memory controller with optional ECC (72-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Four GE ports with Classification and TCP/IP off-load, up to 2 SGMII + 2RGMII or up to 4 RGMII
PCI Express® : One Gen 1/2 (x4/x1) port , Two Gen 1/2 (x1) ports
USB: Two USB 2.0 Hosts with integrated PHYs, One USB 2.0 OTG with integrated PHY
Two SATA 2.0 ports
Other Interfaces: NAND Flash Controller, LCD Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
JTAG / Trace
Product Brief
APM8669x_APM86x90_APM8639x_AN_PwrMgmt_2009_0006.pdf
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
APM86xxx_Aspen_Serengeti2_SW_RN_v1.4_2012_0040.pdf
APM86xxx_swrn_sgeti_aspen_v1.0_2012_0040.pdf
APM8669x_APM86x90E_APM8639xE_UM2011.pdf
PPC465_UM4110.pdf
APM8669x_APM86x90E_APM8639xE_UM2011.pdf
Aspen_BSP_UM_2.02.03.pdf
PPC405EX 询问 27x27 WB-PBGA
400 MHz - 600 MHz
DDR1/2 32b
2 GbE
0
2x1 &amp
1.7 W @400Mhz
1
询问 Single-Core Power™405 processor
DDR1/2 memory controller
Security subsystem (optional)
Two GE ports
PCI Express® : Two Gen 1/2 x1 ports
USB: One USB 2.0 port configurable as either Host or Device
JTAG / Trace
PPC405EX_PB2051_EVK.pdf
405EX_405EXr_WhitePaper.pdf
Checklist_PowerPC_Kilauea_02 Rigel_Calypso QA Testing.pdf
GAN2002_PPC_MarkingDrawings.pdf
OpenWrtReleaseNotes-kilauea-1.00-01.pdf
rel_notes_PPC_Linux_Kilauea_optimized_02.pdf
pismo-release-notes-1.pdf
PPC4xx_UM2025_SLAD.pdf
PPC4xx_UM2025_SLAD.pdf
PPC405_UM2022.pdf
Binaries_openwrt-kilauea-1.00-01.tgz.zip
Linux2_6_25_7_Binaries_PPC_Kilauea_optimized_01.zip
Linux2_6_25_7_Binaries_PPC_Kilauea_optimized_02.zip
IBMDFT_1149_1_1998_V5(1).zip
PPC405EX_ORCAD_SYMBOL.zip
PPC405EXr 询问 27x27 WB-PBGA
333 MHz - 533 MHz
DDR1/2 32b
1 GbE
0
1x1
1.7 W @400Mhz
1
询问 Single-Core Power™405 processor
DDR1/2 memory controller
Security subsystem (optional)
One GE ports
PCI Express® : Two Gen 1/2 x1 ports
USB: One USB 2.0 port configurable as either Host or Device
JTAG / Trace
405EX_405EXr_WhitePaper.pdf
GAN2002_PPC_MarkingDrawings.pdf
PPC4xx_UM2025_SLAD.pdf
PPC405_UM2022.pdf
Binaries_openwrt-kilauea-1.00-01.tgz.zip
Linux2_6_25_7_Binaries_PPC_Kilauea_optimized_01.zip
Linux2_6_25_7_Binaries_PPC_Kilauea_optimized_02.zip
IBMDFT_1149_1_1998_V5(1).zip
PPC460EXR 询问 27x27 WB-PBGA
600 MHz - 1 GHz
DDR1/2 32b
2 GbE
1
1x1 & 1x4
3.9 W @1 Ghz
1
询问 Single-Core Power™440 processor
DDR1/2 memory controller
Security subsystem (optional)
Two GE ports
PCI Express® : One Gen 1/2 x1 port, One Gen 1/2 x4 port
USB: One USB 2.0 Host/Device OTG and Host Interface
JTAG / Trace
SATA controller
GAN2002_PPC_MarkingDrawings.pdf
PPC4xx_UM2025_SLAD.pdf
PPC440H6_464_UM4034 2.pdf
PPC460EXR_ORCAD_SYMBOL.zip
IBMDFT_1149_1_1998_V5(1).zip
PPC460EX 询问 27x27 WB-PBGA
600 MHz - 1 GHz
DDR1/2 32b
2 GbE
1
1x1 & 1x4 & 32b PCI (optional)
3.9 W - 5.0 W @1 Ghz
1
询问 Single-Core Power™440 processor
DDR1/2 memory controller
Security subsystem (optional)
Two GE ports
PCI Express® : One Gen 1/2 x1 port, One Gen 1/2 x4 port, One 32b PCI port (optional)
USB: One USB 2.0 Host/Device OTG and Host Interface
JTAG / Trace
SATA controller
Canyonlands_PB4108.pdf
des0225_12_sch_13.pdf
GAN2002_PPC_MarkingDrawings.pdf
Pismo-Release-Notes-2.00.02.pdf
rel_notes_Canyonlands_optimized_2.6.30_1.13-01.pdf
ep460c_um_amcc.pdf
PPC4xx_UM2025_SLAD.pdf
PPC440H6_464_UM4034 2.pdf
Binaries_CanyonlandsOptimized_2.6.30_1.07-01.tgz.zip
Binaries_CanyonlandsOptimized_2.6.30_1.13-01.tgz.zip
Binaries_openwrt-canyonlands-1.11-03.tgz.zip
Binaries_pismo-2.00.02.tgz.zip
CANYONLAND_PPC460EX.zip
DES0225_12_SCH_13.zip
Docs_pismo-1.04-03.tgz.zip
IBMDFT_1149_1_1998_V5(1).zip
PPC460GT 询问 27x27 WB-PBGA
600 MHz - 1 GHz
DDR1/2 32b
4 GbE
1
1x1 & 1x4 & 32b PCI (optional)
3.9 W - 5.0 W @1 Ghz
0
询问 Single-Core Power™440 processor
DDR1/2 memory controller
Security subsystem (optional)
Four GE ports
PCI Express® : One Gen 1/2 x1 port, One Gen 1/2 x4 port, One 32b PCI port (optional)
JTAG / Trace
SRIO port
GAN2002_PPC_MarkingDrawings.pdf
PPC4xx_UM2025_SLAD.pdf
PPC440H6_464_UM4034 2.pdf
IBMDFT_1149_1_1998_V5(1).zip
APM80186 询问 APM8018x_PB4092.pdf
APM80186_DS4105.pdf
Single-Core Power™405 processor
DDR2 memory controller
Security subsystem
Two GE ports
PCI Express® : One x1 port
USB: One USB 2.0 port configurable as either Host or Device
One SATA port
JTAG / Trace
Klondike_PB4118.pdf
Lanai_Functional_Test_Report_2 01 02 Linux Test Cases.pdf
Lanai_Functional_Test_Report_2 01 02 Summary.pdf
Lanai_Functional_Test_Report_2 01 02 Test Configuration.pdf
Lanai_Functional_Test_Report_2 01 02 Test Matrix.pdf
Lanai_Functional_Test_Report_2 01 02 U-Boot Test Cases.pdf
APM8018x_DDR2_AN_2011_0036.pdf
APM8018x_AN4119_I2C-SPIBootMode.pdf
APM8018x_KlondikeLassen_GSG_2010_0018.pdf
APM8018x_KlondikeLassen_UM_2010_0019.pdf
APM8018x_KlondikeLassenBSP_UM_2010_0024.pdf
PPC405_UM2022.pdf
APM8018x_UM4111.pdf
BuildingOpenWrtwithCodeSourcery.pdf
APM80186_1_0.zip
Binaries_lanai-1.04-02.tgz.zip
md5sum_klondike_rcd.zip
APM80187 询问 APM8018x_PB4092.pdf
Single-Core Power™405 processor
DDR2 memory controller
Security subsystem
Two GE ports
PCI Express® : Two x1 ports
USB: One USB 2.0 port configurable as either Host or Device
JTAG / Trace
Lanai_Functional_Test_Report_2 01 02 Linux Test Cases.pdf
Lanai_Functional_Test_Report_2 01 02 Summary.pdf
Lanai_Functional_Test_Report_2 01 02 Test Configuration.pdf
Lanai_Functional_Test_Report_2 01 02 Test Matrix.pdf
Lanai_Functional_Test_Report_2 01 02 U-Boot Test Cases.pdf
Lassen_PB4127.pdf
APM8018x_DDR2_AN_2011_0036.pdf
APM8018x_AN4119_I2C-SPIBootMode.pdf
APM8018x_KlondikeLassen_GSG_2010_0018.pdf
APM8018x_KlondikeLassen_UM_2010_0019.pdf
APM8018x_KlondikeLassenBSP_UM_2010_0024.pdf
PPC405_UM2022.pdf
APM8018x_UM4111.pdf
BuildingOpenWrtwithCodeSourcery.pdf
Binaries_lanai-1.04-02.tgz.zip
md5sum_klondike_rcd.zip
PPC440EPX 询问 询问 Single-Core Power™440 processor
DDR1/2 memory controller
Security subsystem (optional)
Two GE ports
One PCI V2.2 port
USB: One USB 2.0 Device or Host port and One USB 2.0 Device port
JTAG / Trace
PPC440EPx_PB2041_EVK.pdf
GAN2002_PPC_MarkingDrawings.pdf
PPC440.UM2013 2.pdf
PPC440EPx_BSDL_readme.zip
PPC440GX 询问 询问 Single-Core Power™440 processor
DDR1 memory controller
Two GE ports
One PCI-X V1.0a port
JTAG / Trace
PPC440GX_AN2007_DDR_Tun.pdf
PPC440GX_AN2009_ECC_OvrVw.pdf
PPC440GX_AN2017_TCP_IP_AH.pdf
GAN2002_PPC_MarkingDrawings.pdf
PPC440.UM2013 2.pdf
PPC440GX_PB2043_EVK.pdf
ppc440GX__3cc533c.zip
ppc440gx__3ff533c.zip
IBMDFT_1149_1_1998_V5(1).zip
X

继续使用本网站,即表示您同意根据我们的 Cookie政策 使用cookie