第II层处理器

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MACOM公司的链路层控制器软件产品继续支持先进的网络子系统软件组件，包括集成协议栈到为客户平台提供构件等。

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部件号	订货	描述	ADS & SPICE模型信息	应用笔记	优势	Brightcove视频	兼容部件	目录	数据手册封装概述	硬件手册	设备固件	ESD	EVM GUI软件	EVM用户手册	EVM/参考设计指南	勘误表/不一致	外部链接	特性	IBIS文件	JTAG/BSDL文件	上次购买	引线精加工	无铅	MSL	标志	模型数据(Sparameters)	外形图	用户通知	封装	封装类别	产品介绍	产品公告	产品照片	质量报告	ROHS	RoHS/IPC报告	软件编程/用户指南

CN8478DRV	询问	Device Driver Software for CN8478/4A/2A/1A								28478-DSH-002-E.pdf								Fully documented application programming interface (API) Documented ANSI-C source code Portable to various operating systems Intelligent device management															MACOM_general.png			28478-18_IPC-1752-2_v11a_AmkorP.pdf
CX28224	询问	Dual-Port IMA Traffic Controller		28224-APP-001-A - CX2822x Application Note						询问								Supports 2-port DSL and T1/E1 applications ATM Forum AF-PHY-0086.001 v1.1 Complete SW solutions available Utopia Level 2 and Serial port connectivity Supports 200ms of differential delay Integrated differential delay SRAM Small 17mm BGA package	cx28224.ibs	CX28224_13.bsd CX28224_14.bsd								28229-PCN-001-A.pdf			28224-BRF-001-A.pdf		MACOM_general.png			CX28224-14_IPC-1752-2_v11a_AmkorP.pdf CX28224G-14_IPC-1752-2_v11a_AmkorP_au.pdf
CN8478	询问	256/128/64/32 Channel HDLC Controller MUSYCC								28478-DSH-002-E.pdf					28478-EVMD-001-A.pdf	28478-ERR-003-A.pdf		Per-channel DMA buffer management Per-channel protocol mode selection OSI Layer 2 protocol support Configurable logical channels CN8478/ 8474/ 8472/ 8471 Independent serial interfaces General purpose HDLC (ISO 3309)	100929A.ibs 100976A.ibs 100975A.ibs 100974A.ibs 100932A.ibs 100931A.ibs	100987A.bsd 100988A.bsd								628702A.pdf					MACOM_general.png			28478-17_ipc-1752-2_v1.02.pdf 28478G-18_IPC-1752-2_v1.02.pdf 28478G-17_IPC-1752-2_v1.02.pdf 28478g-17_ipc-1752-2_v1.01.pdf
CN8236	询问	OC-3 ATM SAR Controller with UTOPIA Level 2		2823X-APP-001-A - CN8236 and CN8237 UTOPIA Bus Signal Contention When Running SAR as a UTOPIA Slave on a UTOPIA Level 2 Bus 28236-APP-001-A - SAR VPI/VCI Lookup 28234-APP-003-A - SAR to PHY(s) Microprocessor Interface 28234-APP-001-A - SAR Hardware Timeout Function 2823x-APP-003-A - Vgg Pin Usage on Hardwired SARs Application Note 2823x-APP-002-B - Closing an Active VCC on Mindspeed Hardwired SARs						28236-DSH-001-B.pdf					28236-EVMD-001-A.pdf 28236-EVMD-002-A.pdf 28236-EVMD-003-A.1 28236-EVMD-005-A.zip 28236-EVMD-006-A.xls 28236-EVMD-004-A.ZIP 28236-EVMD-007-A.pdf 613411a.pdf	28236-ERR-001-I.pdf 28296-ERR-001-C.pdf		AAL0, AAL3/4, AAL5, interworking function for AAL1/2 scheduling (cell-on-demand scheduling) 388 BGA,low-power dissipation (0.75 W max)@3.3 V (5 V tolerance) Head-of-line blocking protection for multi-PHY operation Multi-peer architecture with up to 32 peers Dynamic per-VCC scheduling Service-specific performance accelerators -LECD filtering and echo suppression, CLP0+1,Frame Relay DE interworking UTOPIA Level 2,8/16 bit @50 MHz 33 MHz (up to 40 MHz),PCI 2.1 64 K VCC,155 Mbps full duplex with 2-cell PDU Flexible tunneling with mixed service categories (16 priorities) ATM TM 4.1 service categories:ABR, CBR,GFR,VBR-rt,VBR-nrt,GFR	CN8236_1p2.ibs	CN8236.bsd								2XXXX-PCN-003-A.pdf CN-021010.pdf 628702A.pdf 2xxxx-PCN-007-A.pdf			28236-BRF-001-A.pdf		MACOM_general.png			28236-12_IPC-1752-2_v1.02.pdf 28236G-12_IPC-1752-2_v1.02.pdf 28236G-12_IPC-1752-2_v1.01.pdf
CX28229TAP	询问	Telecom Application Package Software								28229-DSH-001-D.pdf								Fully documented application programming interface (API) Family of products provides broad support and aids technology reuse Meets applicable ANSI, Bellcore, ATM Forum, and ITU-T standards Operating system independent Documented ANSI-C source code										28229-PCN-001-A.pdf					MACOM_general.png			CX28229G-14_IPC-1752-2_v11a_AmkorP_au.pdf
M28490	询问	1024 Channel HDLC Controller MUSYCC™								询问								1024 HDLC channels with SS7 or 84 channels with high speed SS7 support Compliant to ITU-T Q.703 (including Annex A) and Q.781 PCI express 1.1 compliant 33/66Mhz ,32 bit PCI 2.1 bus interface 8 independent serial interfaces PM counters (SUERM, AERM and EIM) Complete MTP1, enhanced MTP2 HW protocol with software driver 155.52 Mbps full-duplex throughput															MACOM_general.png
CX28229	询问	Octal/32 Port IMA Traffic Controller		28224-APP-001-A - CX2822x Application Note						28229-DSH-001-D.pdf								Supports DSL and T1/E1 applications ATM Forum AF-PHY-0086.001 v1.1 Complete SW solutions available Utopia Level 2 and Serial port connectivity Integrated differential delay SRAM Small 17mm BGA package Suitable for 8-port & up to 32-port IMA applications	cx28229.ibs	611251A.bsd CX28229_14.bsd								28229-PCN-001-A.pdf CN-042011A-1.pdf			28229-BRF-001-A.pdf		MACOM_general.png			CX28229-14_IPC-1752-2_v11a_AmkorP.pdf CX28229G-14_IPC-1752-2_v11a_AmkorP_au.pdf
M28525	询问	Inverse Multiplexing for ATM (IMA) Family		2852X-APP-001-A - M2852x — Migration from and Differences between the CX2822x to the M2852x						28529-DSH-001-K.pdf								Complete IMA solution in a single package Glueless serial and interleaved highway interfaces to Mindspeed framers Memory expandable to 2 M bytes via external bus Up to 32 IMA groups with 1-32 links/group Field tested software available Octet or Bit level cell delineation Variable link data rates (64K?8.192 Mb/s) UTOPIA Level 2 interfaces Supports 50 ms (beyond the IMA standard requirements for 25 ms) differential delay with 512K Internal memory 32 port, M28529 16 port, M28525										2XXXX-PCN-003-A.pdf CN-100110[1].pdf CN-090309_285XX_Test_PCN_1.pdf CN-021010.pdf 628702A.pdf 28529-Ship-PCN-071610.pdf			28525-BRF-001-B.pdf 28529-BRF-001-B.pdf		617731A.jpg			M28525-12_IPC-1752-2_v1.02.pdf M28529-12_IPC-1752-2_v11a_ASEK.pdf M28525G-12_IPC-1752-2_v1.1a_ASE.pdf
CX28560DRV	询问	Device Driver Software								询问								Fully documented application programming interface (API) Diagnostics Register Configuration Portable to various operating systems Intelligent device management Documented ANSI-C source code															MACOM_general.png
M28529TAP	询问	32-Port IMA Traffic Controller - Telecom Application Package Software								询问								Fully documented application programming interface (API) Family of products provides broad support and aids technology reuse Meets applicable ANSI, Bellcore, ATM Forum, and ITU-T standards Operating system independent Documented ANSI-C source code															MACOM_general.png
CX28560	询问	2,047 Channel HDLC Controller with PL3 Interface		28560-APP-001-A - WAN Transport: HDLC Controller FAQ Application Note CX28560						28560-DSH-001-B.pdf								2,047-channel HDLC controller Dedicated Flowconductor bus for transmit buffers fill level 32-bit full duplex standard POS-PHY Level 3 Bus 32 bits/33 MHz PCI 2.2 bus interfacefor configuration and monitoring OSI Layer 2 protocol support		CX28560.bsd								2XXXX-PCN-003-A.pdf 2XXXX-PCN-004-A.pdf				28560-PBD-001-A.pdf	MACOM_general.png
CX28225	询问	Quad-Port IMA Traffic Controller		28224-APP-001-A - CX2822x Application Note						询问					28225-EVMD-001-A.pdf			Supports 4-port DSL and T1/E1 applications ATM Forum AF-PHY-0086.001 v1.1 Complete SW solutions available Utopia Level 2 and Serial port connectivity Supports 200ms of differential delay Integrated differential delay SRAM Small 17mm BGA package	cx28225.ibs	CX28225_13.bsd CX28225_14.bsd								28229-PCN-001-A.pdf			28225-BRF-001-A.pdf 28225-BRF-002-A.pdf		MACOM_general.png			CX28225-14_IPC-1752-2_v11a_AmkorP.pdf CX28225G-14_IPC-1752-2_v11a_AmkorP_au.pdf
CX28500	询问	1,024 Channel HDLC Controller with PCI Interface								28500-DSH-002-C.pdf					29610-EVMD-001-A.pdf	28500-ERR-001-A.pdf		Single-chip multichannel HDLC controller with a 66 MHz, 32-/64-bit PCI 2.1 compliant bus for configuration, monitoring, and transfer of packet data JTAG boundary scan test support 2.5V core, 3.3V I/O with 5V tolerant inputs Selectable Endian configuration Per-channel protocol mode selection 32 independent serial interfaces 64 Kbytes of on-chip memory for partial packet buffering Per-channel DMA buffer management 500 Mbps full-duplex throughput	101341A.ibs									628702A.pdf CN-100110[1].pdf CN-090309_285XX_Test_PCN_1.pdf				28500-PBD-001-B.pdf	MACOM_general.png			CX28500G-12_IPC-1752-2_v11a_ASAT_Au.pdf m28500-12_ipc-1752-2_v1.02.pdf