时钟与数据恢复

MACOM公司提供一系列灵活的高性能时钟数据恢复 (CDR) 器件,可消除高数据速率系统中的信号抖动问题。我们的CDR器件系列具备设计灵活、可降低成本等特性,不仅适用于传统的网络基础架构,还适用于存储区域网络 (SAN)。

我们的器件采用Mindspeed公司的信号调理技术,支持制造商选用低成本电路板和元件,同时提高设计余量。

我们的CDR器件具备多速率功能,因此非常适合千兆以太网、光纤通道、无限带宽、SONET、PCIe、电信、数据通信以及企业应用。

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部件号 订货 描述 Package Size 最大数据速率(Gbps) 封装类型 电源电压 功耗(瓦) 通道数量 开关矩阵 ADS & SPICE模型信息 优势 Brightcove视频 兼容部件 目录 数据手册封装概述 硬件手册 设备固件 ESD EVM GUI软件 EVM用户手册 嵌入CDR Embedded SerDes 特性 引线精加工 MSL 标志 模型数据(Sparameters) 外形图 用户通知 产品介绍 产品公告 产品照片 质量报告 RoHS/IPC报告
 
 
M37046 询问 Four channel 25G / 28G CDR with Integrated Limiting Amplifier
4x4.5mm CSP
28.1 CSP package
1.8
0.1 4
3980292314001
M37046.pdf
Quad 25.78 Gbps/28.05 Gbps CDR
Supports -40 °C to +85 °C case temperature
Low output jitter and high input jitter tolerance
Low power
Reference-free CDR
High-sensitivity limiting amplifier
Extracted clock output fb/2, fb/8, fb/32 or fb/40 (Monitor clock)
Programmable slice level adjust
Programmable output swing
Integrated PRBS Generator and Checker
Programmable output de-emphasis
Programmable LOS threshold
37046-PBD-001.pdf
3704x-PBD-003.pdf
M37049 询问 Four channel 25G / 28G CDR with input equalizer
4x4.5mm CSP
28 CSP package
1.8
0.1 4
3980292314001
M37049.pdf
Quad 25.78 Gbps/28.05 Gbps CDR
Extracted clock output Fb/2, Fb/8, Fb/32 or Fb/40 (Monitor Clock)
Supports -40 °C to +85 °C case temperature
Low output jitter
High input jitter tolerance
Low power
Reference-free CDR
Adaptive input equalization with optional programmable
Programmable LOS threshold
Programmable output de-emphasis
Programmable output swing
Integrated PRBS Generator and Checker
37049-PBD-001.pdf
3704x-PBD-003.pdf
M37047 询问 Four channel 25G / 28G CDR with Integrated EML driver
4x4.5mm CSP
28 CSP package
1.8 & 3.3
0.3 4
3980292314001
M37047.pdf
Quad 25.78 Gbps/28.05 Gbps CDR
Extracted clock output fb/2, fb/8, fb/32 or fb/40 (Monitor clock)
Supports -40 °C to +85 °C case temperature
Low output jitter
High input jitter tolerance
Low power
Reference-free CDR
Adaptive input equalization with optional programmable
Programmable output swing
Programmable output crossing point
Integrated PRBS Generator and Checker
Programmable LOS threshold
3704X-PBD-003.pdf
MALD-37045 询问 Four Channel 25G / 28G CDR with Integrated VCSEL Driver
28.1 DIE
1.8 & 3.3
4
MALD-37045C_MALD-37145C.pdf
Quad 25.78 Gbps/28.05 Gbps VCSEL Driver/CDR/Equalizer
Configurable Alarm Pin to flag LOS, LOL TX Fault on any channel
Programmable bias (1-15 mA) and modulation (1-13 mA) current
Extracted clock output fb/8 or fb/16 (Monitor clock)
Supports -40 °C to +95 °C die temperature
Transmit power monitor.
Individual Channel Programmability/Power Down
Reference-free CDR with programmable PLL BW and bypass mode
Programmable eye shaping for use with a wide range of VCSELs
MABT-011000.png
M21012 询问 42 Mbps to 3.2 Gbps Quad Multi-Rate CDR
10x10mm 72-pin QFN
3.2 72terminalQFN
1.8-3.3
0.76 4x4
4x4
M21011-12 - V4.pdf
Four independent Multi-Rate CDRs capable of running between 42 Mbps and 3.2 Gbps
Built-in pattern generator and receiver for module and system testing
Typical Total Power Consumption as low as 390 mW with all channels running
Operation with or without a Reference Clock
Signal conditioning features for superior performance on trace lengths of up to 60?
Jitter generation 4.5 mUI, Jitter Tolerance 0.65 UI typical
Flexible Control through I2C-compatible interface or hardwired pins
Flexible DC-Coupled input interface to CML, LVPECL, and LVDS
CN-102810_21XXX_Test.pdf
CN-111010.pdf
21012-BRF-001-B.pdf
Macom gen.png
m21001g-12_ipc-1752-2_v1.02.pdf
M21012G-12_IPC-1752-2_v11a_AmkorK.pdf
M21012G-12_IPC-1752-2_v1.02.pdf
M21011G-12_IPC-1752-2_v11a_AmkorK.pdf
M21011G-12_IPC-1752-2_v1.02.pdf
M37041 询问 Four Channel 25G / 28G CDR with Integrated Input Equalizer
7x7mm 48-pin LFGA
28.1 48pinLFGA
2.5-1.8
0.15 4
1x2
3980292259001
M37041.pdf
Quad 25 Gbps/28 Gbps CDR
Programmable LOS threshold
Programmable output de-emphasis - up to 7.5 dB
Programmable output swing - up to 1100 mV
Supports -40 °C to +95 °C case temperature
Low output jitter
High input jitter tolerance
Low power - 125 mW/channel
Reference-free CDR
Programmable input equalizer - compensates up to 16 dB
Loopback support
3704x-PBD-001-A.pdf
3704x-PBD-002-A.pdf
MACOM_general.png
M21050 询问 a high-performance duplex quad (octal) multi-rate clock and data recovery
10x10mm 72-pin QFN
3.2 72terminalQFN
1.8-2.5
1 8x8
8x8
21050-dsh-001-f.pdf
Eight independent multi-rate CDRs running between 1.0 Gbps-3.2 Gbps in a duplex quad configuration
Optimized for PRBS-or 8b/10b-like data patterns
Built-in pattern generator and receiver for module and system testing
Power consumption of 1W
Flexible control interfaces through 2C or hardwired pins
Operates with or without a reference clock
DC-coupled input interface to CML and Infiniband
Integrated pre-emphasis for driving trace lengths up to 60"
Integrated adaptive equalization allows use of ower cost board materials with increased link performance
21050-BRF-001-B.pdf
Macom gen.png
M21050G-14_IPC-1752-2_v1-02.pdf
M21050G-15_IPC-1752-2_v11a_AmkorK.pdf
M21050G-15_IPC-1752-2_v1-1a_Amkor.pdf
M21050G-14_IPC-1752-2_v11a_AmkorK.pdf
M37040 询问 Four Channel 25G / 28G CDR with Integrated Limiting Amplifier
7x7mm 48-pin LFGA
28.1 48pinLFGA
2.5-1.8
0.15 4
1x2
3980292259001
M37040.pdf
3704x-PBD-001-A.pdf
3704x-PBD-002-A.pdf
MACOM_general.png
MAOM-37051A 询问 Quad 25/28G CDR with Integrated Equalization and EML Driver
7x11mm SMT package
28 SMT
1.8
275 4
MAOM-37051A.pdf
MABT-011000.png
MALD-37145 询问 Four Channel 25G / 28G CDR with Integrated VCSEL Driver
28.1 MALD-37045C_MALD-37145C.pdf
12G SDI Products.png
MATA-37144 询问 Four Channel 25G / 28G CDR with Integrated TIA
28.1 MATA-37044C_MATA-37144C.pdf
12G SDI Products.png
MATA-37044 询问 Four Channel 25G / 28G CDR with Integrated TIA
28.1 DIE
1.8 & 3.3
4
MATA-37044C_MATA-37144C.pdf
-12 dBm typical sensitivity: BER 1E-5, 0.5A/W, 25.78 Gbps, ER=4 dB
Supports -40 °C to +95 °C die temperature
Average Photodiode current monitor (RSSI) four channels on one output
Configurable Alarm Pin to flag LOS or LOL on any channel
Individual Channel Programmability/Power Down
Reference-free CDR with programmable PLL BW and bypass mode
High-sensitivity limiting amplifier with programmable slice level adjust and LOS threshold
Programmable output swing, squelch and de-emphasis
Extracted clock output fb/8 or fb/16 (Monitor clock)
Configurable Alarm Pin to flag for LOS or LOL in any channel
2 Wire I2C (Upto 400 kHz)
MABT-011000.png
MASC-37048 询问 Four channel 25G / 28G CDR with input equalizer
4x4.5mm CSP
28 CSP Package
1.8
0.1 4
MASC-37048
Reference-free CDR
Low power
High input jitter tolerance
Low output jitter
Supports -40 °C to +85 °C case temperature
Extracted clock output Fb/2, Fb/8, Fb/32 or Fb/40 (Monitor Clock
Quad 25.78 Gbps/28.05 Gbps CDR
Programmable output de-emphasis
Programmable LOS threshold
Adaptive input equalization with optional programmable
Integrated PRBS Generator and Checker
Programmable output swing
Cross-Point Adjustment
Macom gen.png
MASC-37028 询问 Multi-Rate, Dual 28Gbps CDR with Integrated Laser Driver
5 mm x 5 mm LGA (Land Grid Array) package
28 LGA Package
1.8/3.3
2
5x5
MASC-37028B_MASC-37029B.pdf
MASC-37028_MASC-37029_PBD.pdf
MASC-37028_MASC-37029_PBD_4.pdf
MASC-37028_MASC-37029_PBD_3_B.pdf
Macom gen.png
MASC-37029 询问 Multi-Rate, Dual 28Gbps CDR with Integrated Laser Driver
5 mm x 5 mm LGA (Land Grid Array) package
26.5 LGA Package
1.8/3.3
2
5x5
MASC-37028B_MASC-37029B.pdf
MASC-37028_MASC-37029_PBD.pdf
MASC-37028_MASC-37029_PBD_4.pdf
MASC-37028_MASC-37029_PBD_3_B.pdf
Macom gen.png
MALD-37645 询问 Multi-Rate 28G VCSEL Driver/CDR with Input Equalizer
2.3 x 1.4 mm
28 Die
1.8
0.26 1
N/A
MALD-37645.pdf
MACOM Gen.png
MATA-37644 询问 Multi-Rate 28G CDR with TIA /LA Integrated
2.3 x 1.4 mm
28 Die
1.8
0.26 1
N/A
MATA-37644.pdf
MACOM Gen.png
MAOM-37447A 询问 Quad 24.3G / 25.8G CDR with Adaptive Equalization and EML Driver
4 x 4.5 mm CSP
25.7 CSP
1.8
4
MAOM-37447A.pdf
MAOM-37447_EUG.pdf
MAOM-37447_EUG.pdf
MASC-37446A 询问 Four channel 25G / 28G CDR with Integrated Limiting Amplifier
4x4.5mm CSP
28.1 CSP package
1.8
0.1 4
3980292314001
MASC-37446A.pdf
Quad 25.78 Gbps/28.05 Gbps CDR
Supports -40 °C to +85 °C case temperature
Low output jitter and high input jitter tolerance
Low power
Reference-free CDR
High-sensitivity limiting amplifier
Extracted clock output fb/2, fb/8, fb/32 or fb/40 (Monitor clock)
Programmable slice level adjust
Programmable output swing
Integrated PRBS Generator and Checker
Programmable output de-emphasis
Programmable LOS threshold
37046-PBD-001.pdf
3704x-PBD-003.pdf
MASC-37448A 询问 Four channel 25G / 28G CDR with input equalizer
4x4.5mm CSP
28 CSP package
1.8
0.1 4
3980292314001
MASC-37448A.pdf
Quad 25.78 Gbps/28.05 Gbps CDR
Extracted clock output Fb/2, Fb/8, Fb/32 or Fb/40 (Monitor Clock)
Supports -40 °C to +85 °C case temperature
Low output jitter
High input jitter tolerance
Low power
Reference-free CDR
Adaptive input equalization with optional programmable
Programmable LOS threshold
Programmable output de-emphasis
Programmable output swing
Integrated PRBS Generator and Checker
37049-PBD-001.pdf
3704x-PBD-003.pdf
MASC-37053A 询问 Quad 25.8G/28G CDR with Adaptive Equalization and PCML Driver
4mm x 4.5mm Chip Scale Package (CSP)
25.8 CSP
4
询问 MACOM Gen.png
M37044 询问 Quad 24G / 26G TIA /LA with Integrated CDR
3mm x 2mm Die
24 Die
3.3 and 1.8
4
询问 MACOM Gen.png
MATA-37442 询问 Quad 24G / 26G TIA /LA with Integrated CDR
3mm x 2mm Die
24 Die
3.3 and 1.8
4
询问 MACOM Gen.png
M37045 询问 Quad 24G/26G CDR/VCSEL Driver with Input Equalizer
3mm x 2mm Die
24 3.3 and 1.8
4
询问 Companion device to the MATA-37444 and MATA-37442 Quad 24G/26G CDR with TIA/LA
MACOM Gen.png
MALD-37445 询问 Quad 24G/26G CDR/VCSEL Driver with Input Equalizer
3mm x 2mm Die
24 3.3 and 1.8
4
询问 Companion device to the MATA-37444 and MATA-37442 Quad 24G/26G CDR with TIA/LA
MACOM Gen.png
MATA-37444 询问 Quad 24G / 26G TIA /LA with Integrated CDR
3mm x 2mm Die
24 Die
3.3 and 1.8
4
询问 MACOM Gen.png
MATA-37244 询问 Four Channel 25G / 28G CDR with Integrated TIA/Limiting Amplifier
28 DIE
1.8 & 3.3
4
询问 -12 dBm typical sensitivity: BER 1E-5, 0.5A/W, 25.78 Gbps, ER=4 dB
Supports -40 °C to +95 °C die temperature
Average Photodiode current monitor (RSSI) four channels on one output
Configurable Alarm Pin to flag LOS or LOL on any channel
Individual Channel Programmability/Power Down
Reference-free CDR with programmable PLL BW and bypass mode
High-sensitivity limiting amplifier with programmable slice level adjust and LOS threshold
Programmable output swing, squelch and de-emphasis
Extracted clock output fb/8 or fb/16 (Monitor clock)
Configurable Alarm Pin to flag for LOS or LOL in any channel
2 Wire I2C (Upto 400 kHz)
MACOM Gen.png